High voltage DMOS(Diffused Metal Oxide Semiconductor) devices fall in two types. The planar type (no field or drift region) up to 50 volts and Field/Drift using in most cases RESURF physics up to 100 volts. The challenge has been how to improve device performance i.e. reducing on-resistance and maintaining good robust breakdown voltage. This invention introduces a novel new generation of high voltage device architecture that breaks the limit line of silicon. This architecture may extend to higher material resistivity and larger geometry to increase the voltage to 1 kv plus.
A high power MOSFET semiconductor having a high breakdown voltage. The MOSFET semiconductor device is defined having a fine-structured wells of opposite doping type to the drift region in a way that the doping integral along the line perpendicular to the current flow remains smaller than the material specific breakthrough charge, which is for silicon 2.1012/cm2. The electric field inside the device structure is fixed by the net charge of the two opposite doped wells. Therefore, a nearly horizontal field distribution can be achieved if both regions counterbalance each other perfectly. For higher blocking voltage only the depth of the wells has to be increased without altering the doping. This leads to a relationship between the blocking voltage and on-resistance that is linear in nature. This technique can produce a device having 1000 volts blocking voltage and RDSon reduction in the range of one order of magnitude compared to conventional technologies.